1. Field of the Invention
The present invention relates to implementing a processor and peripherals. More specifically, the present invention relates to methods and apparatus for enabling the description and implementation of parameterizable processors and peripherals on a programmable chip.
2. Description of the Prior Art
A number of benefits have spurred efforts towards higher levels of system integration. Integrating processors and peripherals on a single integrated circuit allows compact system size, low power requirements, durability, high-performance, and low unit costs. The integration efforts have been focused in several areas. Some efforts have been focused on microcontrollers. Standard microcontrollers are generic components that can be used in a variety of applications. Generic microcontrollers can be found in microwave ovens, television remote controls, digital clocks, etc. Many microcontrollers include a processor, memory, and peripherals on a single integrated circuit. Microcontrollers are available with a variety of different price, performance, and peripheral integration options and are sold by companies such as Microchip Corporation of Chandler, Ariz. and Motorola Corporation of Arlington Heights, Ill. However, microcontrollers are not application-specific. Typical microcontroller based systems require additional integrated circuit components to provide system specific logic.
A wide variety of different microcontrollers are also required because microcontrollers are not programmable. That is, if a microcontroller is fabricated to work with one particular type of memory, it typically will not work with other types of memory. A different microcontroller will have to be used. Furthermore, although microcontrollers can only be used in certain contexts, they are not optimized for any particular application. Typical microcontrollers may include logic that is unnecessary in a particular application or may not include logic that is particularly essential. The drawbacks limit the efficiency of microcontroller operation.
Other integration efforts have been focused in the area of application-specific integrated circuits or ASICs. ASICs are custom-designed integrated circuits for specific usages. ASIC design tools are available from Synopsys of Mountain View, Calif. and Avant! of Fremont, Calif. ASICs can include processors and peripherals. Because ASICs are custom-designed, they are relatively fast compared to generic microcontrollers. However, the process of designing, verifying, fabricating, and testing ASICs is time-consuming and expensive. Any flaw uncovered on a particular ASIC after fabrication is complete requires a vast amount of time and expense to correct. Furthermore, like generic microcontrollers, ASICs are not programmable. An ASIC fabricated with a single timer can not be reconfigured to have a second timer.
More recently, some efforts have been focused on integration in the context of programmable chips. Programmable logic allows custom logic in an integrated circuit while avoiding time-consuming and expensive engineering processes associated with designing ASICs. Many programmable logic chips can be reconfigured with a new design relatively quickly. Triscend Corporation of Mountain View, Calif. offers a graphical user interface in its “FastChip Tool” for specifying a collection of peripherals for use with hard-wired processor core. However, the Triscend tool does not allow configuration of the processor core, as that core is built into the target hardware device. In one example, the processor core of a Triscend programmable chip can not be reconfigured to run faster or slower based on the specific application requirements.
A processor core based on hardwired logic is less flexible than a processor core based on undifferentiated programmable logic. ARC Cores of Elstree, United Kingdom provides a graphical user interface in its ARChitect tool to configure processor cores in programmable chips. However, ARC Cores does not provide parameterizable peripherals that can be easily integrated with the parameterizable processor core and downloaded onto a programmable chip. It has proven difficult to enable parameterization of processor cores and peripherals in a programmable chip. Differing standards for peripheral interface buses cause problems. Many problems occur at the interconnection level between processor and peripherals.
It is therefore desirable to provide improved methods and apparatus for implementing programmable chips.